Описание
Descriptio
The TS512MFB72V8R-T is a 512M x 72bits ECC DDR2-800 Fully Buffered DIMM.The TS512MFB72V8R-T consists of 36pcs 256Mx4bits DDR2 DRAM in 60 balls FBGA package, 1 pc AMB IC, and a 2048 bits serial EEPROM on a 240-pin printed circuit board. The TS512MFB72V8R-T is a 240pin fully buffered dual in-line memory module. The Advanced Memory Buffer also allows buffering of memory traffic to support large memory capacities. All memory control for the DRAM resides in the host, including memory request initiation, timing, refresh, scrubbing, sparing, configuration access, and power management. The Advanced Memory Buffer interface is responsible for handling channel and memory requests to and from the local DIMM and for forwarding requests to other DIMM on the memory channel. Fully Buffered DIMM provides a high memory bandwidth, large capacity channel solution that has a narrow host interface. Features RoHS compliant products. 240pin fully buffered dual in-line memory module 3.2Gb/s, 4.0Gb/s, 4.8Gb/s link transfer rate 1.8V +/- 0.1V Power Supply for DRAM VDD/VDDQ 1.5V +/- 0.075V Power Supply for AMB VCC 3.3V +/- 0.3V Power Supply for VDDSPD Buffer Interface with high-speed differential point-to-point Link at 1.5 volt Channel error detection & reporting Channel fail over mode support Serial presence detect with EEPROM 8 Banks Posted CAS Programmable CAS Latency: 3, 4, 5, 6 Automatic DDR2 DRAM bus and channel calibration MBIST and IBIST Test functions Hot add-on and Hot Remove Capability Transparent mode for DRAM test support Support ECC Function.